From the Institute of Computing Technology division of the Chinese Academy of Sciences and Peng Cheng Laboratory comes a high-performance and well-documented RISC-V core called XiangShan. In the Git ...

If you read Japanese, you might have seen the book “Design and Implementation of Microkernels” by [Seiya Nuda]. An appendix covers how to write your own operating system for RISC-V in about 1,000 ...

Forbes contributors publish independent expert analyses and insights. Dave Altavilla is a Tech Analyst covering chips, compute and AI. For decades, chip architectures have been dominated by a pair of ...

Have you ever wondered if there’s a way to break free from the dominance of proprietary computing architectures like x86 and ARM? For decades, these platforms have dictated the rules of the game, ...

The 2024 RISC-V Summit North America marked a significant milestone for the RISC-V community with the ratification of the RVA23 Profile. This event signifies a major step forward in the evolution of ...

RISC-V, an open instruction set architecture (ISA), is reshaping the global computing landscape. Unlike proprietary ISAs such as x86, widely used by Intel and AMD, or ARM, which dominates mobile and ...

There’s been a significant shift toward RISC-V architectures in SoC design. This article highlights its impact on the semiconductor industry and role in fostering innovation and flexibility in ...

We’ve covered the Framework Laptop 13 primarily as a consumer Windows laptop, reviewing versions with multiple Intel and AMD processors. But the system’s modular nature makes it possible to expand it ...

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...

RISC-V architecture is an open, international standard governing how software interfaces with hardware in a computer. It serves as a shared language that sets the parameters for communication and ...